Implementing paging optimization to avoid populate on page fault during an io read

ABSTRACT

A method and system for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read. A size of the IO read is evaluated. If the IO does not entirely cover a page, then the page is paged in. If the IO entirely covers one or more pages, those pages are not paged in. Page attributes may be different during the IO read. Pages that are paged in are marked readable and writable but pages that are waiting for the IO to populate them are only marked writeable. Once the IO read has completed, the pages are marked readable and writable and all outstanding faults due to reads during this window are completed.

FIELD OF THE INVENTION

The present invention relates generally to the data processing field, and more particularly, relates to a method and system for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read.

DESCRIPTION OF THE RELATED ART

FIGS. 2A-2C together illustrate a prior art normal read flow with page populate. When a page fault is taken attempting to read or write a location in virtual memory that has been paged out, the paging system must first find free real memory to map to that virtual address, then it must read data, potentially from disk, back into memory before calling the fault complete and resuming running.

To perform an IO read, potentially from a storage subsystem, the destination memory must first be pinned, or set such that the real memory is available and will not be paged out while the IO operation is in progress. If the destination has been paged out, it must first be paged in, then marked such that it will not be paged out, and then the IO may begin.

As part of the IO read operation, the memory region or a portion of the memory region will be overwritten with the data from the IO. Potentially, this region to be overwritten had just been paged in simply to be pinned in memory. Paging this memory in, only to have it overwritten adds unnecessary latency and IO to the operation.

A need exists for an effective mechanism to enable enhanced paging optimization to avoid populate on page fault during an IO read.

SUMMARY OF THE INVENTION

Principal aspects of the present invention are to provide a method and system for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read. Other important aspects of the present invention are to provide such method, system and memory controller and DRAM configuration which can, under certain conditions, double the number of accesses, substantially without negative effects and that overcome some of the disadvantages of prior art arrangements.

In brief, a method and system for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read. A size of the IO read is evaluated. If the IO does not entirely cover a page, then the page is paged in. If the IO entirely covers one or more pages, those pages are not paged in. Page attributes may be different during the IO read. Pages that are paged in are marked readable and writable but pages that are waiting for the IO to populate them are only marked writeable. Once the IO read has completed, the pages are marked readable and writable and all outstanding faults due to reads during this window are completed.

In accordance with features of the invention, during the time of the IO read, while a page is marked as non-readable, if a read page fault occurs, the fault handler waits for the IO read to complete prior to returning from the fault.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention together with the above and other objects and advantages may best be understood from the following detailed description of the preferred embodiments of the invention illustrated in the drawings, wherein:

FIG. 1A illustrates an example computer system for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read in accordance with preferred embodiments;

FIG. 1B illustrates example operations for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read in accordance with preferred embodiments

FIGS. 2A-2C together illustrate prior art normal read flow with page populate;

FIGS. 3A and 3B and FIGS. 4A and 4B respectively illustrate example operations for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read in accordance with preferred embodiments; and

FIG. 5 is a block diagram illustrating a computer program product in accordance with the preferred embodiment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In the following detailed description of embodiments of the invention, reference is made to the accompanying drawings, which illustrate example embodiments by which the invention may be practiced. It is to be understood that other embodiments may be utilized and structural changes may be made without departing from the scope of the invention.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.

In accordance with features of the invention, a method and system for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read. The system implements paging optimization to avoid populating the memory and having to overwrite it again as part of an IO read, the size of the IO read is determined. If it is determined not to cover an entire page, then the page is paged in. But, if it covers an entire page, or multiple pages, then the entirely covered pages do not need to be paged in. Page attributes also have to be considered since they can be different during an IO read; paged in pages can be marked as readable and writeable, and those that are not and are still waiting to be populated during an IO read, can be marked writeable. If a page is marked as non-readable, but then a page fault occurs, the fault handler must wait for the IO read to complete before it returns from the fault.

Having reference now to the drawings, in FIG. 1A, there is shown an example computer system generally designated by the reference character 100 for implementing paging optimization to avoid populate on page fault during an 10 read in accordance with the preferred embodiment. Computer system 100 includes one or more processors 102 or general-purpose programmable central processing units (CPUs) 102, #1-N. As shown, computer system 100 includes multiple processors 102 typical of a relatively large system; however, system 100 can include a single CPU 102. Computer system 100 includes a cache memory 104 connected to each processor 102.

Computer system 100 includes a memory system 106 including a memory controller 108 and a main memory 110 connected by a bus 112. Bus 112 is one or more busses that send address/command information to main memory 110 and send and receive data from the memory 110. Main memory 110 is a random-access semiconductor memory for storing data, including programs. Main memory 110 is comprised of, for example, a dynamic random access memory (DRAM), a synchronous direct random access memory (SDRAM), a current double data rate (DDRx) SDRAM, non-volatile memory, optical storage, and other storage devices.

I/O bus interface 114, and buses 116, 118 provide communication paths among the various system components. Bus 116 is a processor/memory bus, often referred to as front-side bus, providing a data communication path for transferring data among CPUs 102 and caches 104, memory controller 108 and I/O bus interface unit 114. I/O bus interface 114 is further coupled to system I/O bus 118 for transferring data to and from various I/O units.

As shown, computer system 100 includes a storage interface 120 coupled to storage devices, such as, a direct access storage device (DASD) 122, and a CD-ROM 124. Computer system 100 includes a terminal interface 126 coupled to a plurality of terminals 128, #1-M, a network interface 130 coupled to a network 132, such as the Internet, local area or other networks, and a I/O device interface 134 coupled to I/O devices, such as a first printer/fax 136A, and a second printer 136B.

I/O bus interface 114 communicates with multiple I/O interface units 120, 126, 130, 134, which are also known as I/O processors (IOPs) or I/O adapters (IOAs), through system 110 bus 116. System 110 bus 116 is, for example, an industry standard PCI bus, or other appropriate bus technology.

Computer system 100 is shown in simplified form sufficient for understanding the present invention. The illustrated computer system 100 is not intended to imply architectural or functional limitations. Although main memory 110 of main memory system 106 is represented conceptually in FIG. 1A as a single entity, it will be understood that in fact the main memory is more complex. In particular, main memory system 106 comprises multiple modules and components. The present invention can be used with various hardware implementations and systems and various other internal hardware devices.

Referring to FIG. 1B, there are shown example operations for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read in accordance with preferred embodiments. As indicated in a block 150, an IO read is issued. For each page as indicated in a block 152, until all pages are processed as indicated in a decision block 154 checking if the page is in memory is performed as indicated in a decision block 156. If this data already resides in memory, then the page is pinned as indicated in a block 158 as conventionally done. If this data does not already reside in memory, then checking if the IO read covers an entire page is performed as indicated in a decision block 160. If the IO will not cover the entire page, then the page is mapped and pinned and the data for the page is paged in as indicated in a block 162 as conventionally done. If the IO read covers an entire page, then the memory is mapped and pinned and the page is then marked writable but not readable as indicated at block 164.

In known systems, while the IO is pending, an access to this page prior to the page being populated would cause a fault. Any access would have to wait for the fault to be resolved. Once the page was populated but while the IO is pending, accesses could be made to the page without causing a fault. However, given there is an IO in the process of writing data to that page, writes to that page are in a race with the IO read data and reads may get old or new data.

In accordance with features of the invention, while the IO is pending, the page is essentially populated with garbage data. So, a read to this region would not get “old” or “new” data and thus must be blocked. Thus, a read to this page would cause a fault, just as it does prior to the page being populated prior to the present invention. A write to this region is in a race with the IO read, just as it is without the present invention, thus a write can be allowed to proceed. However, it should be noted that a write from a core which causes a cache line to populate is actually a read and can not be permitted.

After each page has been assessed at decision block 154, then the IO read is started as indicated in a block 166. The IO read is complete as indicated in a block 168. For each page as indicated in a block 170 checking until no more pages are identified is performed as indicated in a decision block 172, the page is unpinned and marked as writeable and readable as indicated in a block 174. Any reads waiting on page faults for this page are released as indicated in a block 176. When no more pages are identified at decision block 168, then the IO read request is completed as indicated in a block 178.

Referring to FIGS. 3A and 3B, there are shown example operations for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read in accordance with preferred embodiments.

In FIGS. 3A and 3B, example novel read flow without full page populate operations are shown. In FIG. 3A, as indicated in a block 300, physical memory to the read destination is assigned, as indicated by line 1 between CPU and code 322 to map 324 in FIG. 3B. Pin the memory so it will not be swapped as indicated in a block 302, as indicated by line 2 between CPU and code 322 to map 324 in FIG. 3B. In FIG. 3A, as indicated in a block 304, for partial page, such as partial pages 326, 332 in FIG. 3B, the memory is populated or the partial page is paged in as indicated by lines 3 between storage 334 and the partial pages 326, 332 in FIG. 3B. In FIG. 3A, as indicated in a block 306, the partial pages are marked for read write, and full pages, such as pages 328, 330 in FIG. 3B, are marked for write but not read, as indicated by line 4 between CPU and code 322 to map 324. In FIG. 3A, as indicated in a block 308, the IO read requested is performed, and lines 5 between storage 334 and the partial and full pages 326, 328, 330, 332 in FIG. 3B. In FIG. 3A, as indicated in a block 310, the full pages are marked as read and write, and by line 6 between CPU and code 322 to map 324 in FIG. 3B. In FIG. 3A, as indicated in a block 312, the memory is unpinned, as indicated by line 7 between CPU and code 322 to map 324 in FIG. 3B.

Referring to FIGS. 4A and 4B, there are shown example operations for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read in accordance with preferred embodiments.

In FIGS. 4A and 4B, example novel read flow without page populate operations are shown. In FIG. 4A, as indicated in a block 400, physical memory is assigned to the read destination as indicated by line 1 between CPU and code 422 to map 424 in FIG. 4B. Pin the memory so it will not be swapped as indicated in a block 402, as indicated by line 2 between CPU and code 422 to map 424 in FIG. 4B. In FIG. 4A, as indicated in a block 404, the full pages, such as full pages 428, 430 in FIG. 4B, are marked for write but not read, as indicated by line 3 between CPU and code 422 to map 424 in FIG. 4B. In FIG. 4A, as indicated in a block 406, the 10 read requested is performed, and as indicated by lines 4 between storage 434 and the full pages 428, 430 in FIG. 4B. In FIG. 4A, as indicated in a block 408, the full pages are marked as read and write, and as indicated by line 5 between CPU and code 422 to map 424 in FIG. 4B. In FIG. 4A, as indicated in a block 410, the memory is unpinned, and as indicated by line 6 between CPU and code 422 to map 424 in FIG. 4B.

Referring now to FIG. 5, an article of manufacture or a computer program product 500 of the invention is illustrated. The computer program product 500 is tangibly embodied on a non-transitory computer readable storage medium that includes a recording medium 502, such as, a floppy disk, a high capacity read only memory in the form of an optically read compact disk or CD-ROM, a tape, or another similar computer program product. Recording medium 502 stores program means 504, 506, 508, and 510 on the medium 502 for carrying out the methods for implementing paging optimization to avoid populate on page fault during an Input Output (10) read.

A sequence of program instructions or a logical assembly of one or more interrelated modules defined by the recorded program means 504, 506, 508, and 510, direct the system 100 for implementing paging optimization to avoid populate on page fault during an Input Output (10) read of the preferred embodiments.

While the present invention has been described with reference to the details of the embodiments of the invention shown in the drawing, these details are not intended to limit the scope of the invention as claimed in the appended claims. 

What is claimed is:
 1. A method for implementing paging optimization to avoid populate on page fault during an Input Output (TO) read comprising: providing a processor, said processor performing the steps of determining a size of the IO read; responsive to the IO read entirely coverings one or more full pages, the full pages not being paged in; evaluating page attributes during the IO read; marking pages waiting for the IO to populate these pages as only writeable; and marking the page readable once the IO read has completed and completing all outstanding faults due to reads.
 2. The method as recited in claim 1 includes assigning physical memory to the read destination for the IO read.
 3. The method as recited in claim 2 includes pinning the assigned memory for avoiding memory being swapped.
 4. The method as recited in claim 1 includes for a page being marked as non-readable, responsive to a read page fault occurs, waiting for the IO read to complete prior to returning from the fault.
 5. The method as recited in claim 1 includes responsive to the IO not entirely covering a page, paging in the page.
 6. The method as recited in claim 5 includes marking pages being paged in as readable and writeable after the pages are paged in.
 7. A system for implementing paging optimization to avoid populate on page fault during an Input Output (TO) read comprising: a processor, said processor determining a size of the IO read; said processor, responsive to the IO entirely coverings one or more full pages, the full pages not being paged in; said processor, evaluating page attributes during the IO read; said processor, marking pages that are waiting for the IO to populate these pages as only writeable; said processor, marking the page as readable once the IO read has completed and completing all outstanding faults due to reads.
 8. The memory system as recited in claim 7, includes control code stored on a computer readable medium, and wherein said processor uses said control code to implement paging optimization to avoid populate on page fault during an Input Output (TO) read.
 9. The memory system as recited in claim 7 includes said processor, assigning physical memory to the read destination for the IO read.
 10. The system as recited in claim 9 includes said processor, pinning the assigned memory for avoiding memory being swapped.
 11. The system as recited in claim 7 includes said processor, for a page being marked as non-readable, responsive to a read page fault occurs, waiting for the IO read to complete prior to returning from the fault.
 12. The system as recited in claim 7 includes said processor, responsive to the IO not entirely covering a page, paging in the page.
 13. The system as recited in claim 12 includes said processor, marking pages being paged in as readable and writeable after the pages are paged in. 1-6. (canceled)
 7. A system for implementing paging optimization to avoid populate on page fault during an Input Output (IO) read comprising: a processor, said processor determining a size of the IO read; said processor, responsive to the IO entirely coverings one or more full pages, the full pages not being paged in; said processor, evaluating page attributes during the IO read; said processor, marking pages that are waiting for the IO to populate these pages as only writeable; said processor, marking the page as readable once the IO read has completed and completing all outstanding faults due to reads.
 8. The memory system as recited in claim 7, includes control code stored on a computer readable medium, and wherein said processor uses said control code to implement paging optimization to avoid populate on page fault during an Input Output (IO) read.
 9. The memory system as recited in claim 7 includes said processor, assigning physical memory to the read destination for the IO read.
 10. The system as recited in claim 9 includes said processor, pinning the assigned memory for avoiding memory being swapped.
 11. The system as recited in claim 7 includes said processor, for a page being marked as non-readable, responsive to a read page fault occurs, waiting for the IO read to complete prior to returning from the fault.
 12. The system as recited in claim 7 includes said processor, responsive to the IO not entirely covering a page, paging in the page.
 13. The system as recited in claim 12 includes said processor, marking pages being paged in as readable and writeable after the pages are paged in. 